Intellectual property (IP) before buyers purchase IP core investment must be forewarned and prepared. This is the industry experts to participate in Denali Memcon days before the view. The meeting by the EETimes semiconductor editor Ron Wilson presided over the guests include: Denali Software Sean Smith Rambus, chief architect to verify the engineering design director Kevin Jones, CISCO (Cisco Systems) hardware design engineering manager Shyam Pullela, Sun Microsystems and Mehta Shrenik before the end of technical director LSI LogicCoreWare IP marketing director Harmel Sangha.
IP industry was abandoned by the industry a few years ago, and now it is tenacious to seek a viable business model, and in the system level chip method to establish a more mainstream Design Frontier position. Wilson surveyed three suppliers and two users on the preparation, validation and other issues continue to challenge the IP model.
He pointed out that the latest Industry Challenge study found that: IP selection of research shows that many of the respondents have decided to use the IP in the design approach in an almost off the shelf. Guests also think this is very common, but usually everyone is not easy to be cautious. CISCO systems hardware engineering manager Shyam Pullela said that many of the ready-made action from the last minute decision. "You're looking for IP because you're always in a hurry," he said. "So you're always in a hurry," he said, adding that there was no need for a careful decision on how to integrate IP into your processes. "You'd better spend your time (IP) and its content in the first place."
Rambus DFT and modeling validation engineering director Kevin Jones focuses on the "buyer cautious" argument, especially when verifying IP in system conditions. He said: "we should consider how it was built? How was it tested? IP it's not the same deep water."
The chief officer of Sean Denali verification Smith also pointed out that too many users tend to think IP is That's final., they need not worry about. For example, a PCI Express kernel, is a complex logic block. "(PCI Express) IP providers are able to implement and ensure that the opportunity for the 100% specification does not exist," he noted.
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